One type of driver circuit that is frequently employed, particularly on integrated circuit chips, includes first and second opposite conductivity type transistors, each including a control electrode and a path which is switched on and off between a pair of further electrodes. Each path is switched on and off in response to a voltage applied to the control electrode of the particular transistor being on opposite sides of a threshold. The paths of the first and second transistors are connected in series across terminals of a DC power supply. An output terminal between the series connected paths drives a load.
In a typical integrated circuit chip, the transistors are opposite conductivity type metal oxide semiconductor field effect transistors (MOSFETs), wherein the control electrodes are gate electrodes and the further electrodes are source and drain electrodes. Such a driver includes a positive channel field effect transistor (PFET) and a negative channel field effect transistor (NFET). The switched path between the source and drain electrodes of each field effect transistor (FET) is frequently referred to as a source drain path and the source drain paths of the PFET and NFET are connected in series across opposite polarity terminals of the power supply.
The typical integrated circuit chip includes many such drivers that are responsive to bilevel sources having positive and negative going transitions between first and second voltage levels that are usually approximately equal to the voltages at the power supply terminals. The bilevel sources can be either data or clock sources. In response to the bilevel source being at the first (low) voltage level, the PFET and NFET are respectively on and off, while the NFET and PFET are respectively on and off in response to the bilevel source being at the second (high) voltage level. A relatively high impedance is provided by the source drain path of the NFET or PFET which is off so that substantial current does not flow through both the PFET and NFET of the driver while the bilevel source is at the first and second voltage levels. To minimize power consumption, the PFET and NFET should not be on at the same time during the transitions.
Many of the drivers of the foregoing type on a typical integrated circuit chip are simultaneously responsive to the transitions. If many of the drivers of the foregoing type are simultaneously responsive to the transitions and if the PFET and NFET of each of these drivers were on at the same time during the transitions, a substantial amount of current, frequently referred to as crow bar current, would be drawn from the power supply. The current could be so great as to cause overheating of the integrated circuit chip and result in a substantial decrease in the voltage between the power supply terminals. Similar problems can also exist with bipolar drivers including PNP and NPN transistors having series connected emitter collector paths.
In the past, one approach to resolving the problem has involved complicated circuitry which takes into account processing variables in making the integrated circuits, as well as changes that occur to the circuit elements as a result of power supply voltage and temperature variations of the integrated circuit chip carrying the circuitry. Another complicated approach has involved staging a number of field effect transistors. These complicated circuits occupy a significant amount of space on the integrated circuit chip and consume additional power, resulting in possible unnecessary heating of the chip.
There is a prior art circuit wherein conventional capacitors are connected in negative feedback paths to the gates of opposite conductivity type field effect transistors having series connected source drain paths. One electrode of each capacitor is connected to an output terminal between the source drain paths, while the other electrode of each capacitor is connected to the gate electrode of one of the field effect transistors. A problem with this approach is that the voltage across each of the capacitors varies as a function of load variations. Hence, switching of the field effect transistors is a function of the load variations which can result in poor control. In this prior art circuit, both field effect transistors appear to be turned on simultaneously during a transition, resulting in substantial current flow. Another problem with this prior art circuit is that the capacitors are charged and discharged through source drain paths of additional field effect transistors, rather than through resistors.